// Generated by Chintan Patel
// Testbench for CMPE 310 Project4


`timescale 1ns/1ns

// Check that you signal names are data, address, read and write as below.
// You don't need to have the reg_data and write_en signals in you design. 
// They are required only for the testbench functionality.

module project4_test ;
	wire [7:0] data;
    	reg [7:0] reg_data;
	reg [13:0] address;
    	reg read;
    	reg write;
	reg write_en;
	assign data = write_en ? 8'bz : reg_data;

// Make sure the design name you used is project4

project4 instance1 (data, address, read, write);

// Change this line as discussed in class. You need to change the instance hierarchy
// Copy the project4_input.dat from the class webpage and change the path below to reflect the correct location.

defparam instance1.page1_i1.MEMORYFILE = ("./project4_input.dat");


// Don't touch this part of the code unless you know what you are doing

initial
begin
	$display ("PROM LOADED");
	address = {2'b00,12'h000};
	read = 1'b1;
	write = 1'b1;
	write_en = 1'b1;
	$display ("OUTPUT FORMAT IS: Time,read,write,address,data");	
	$display ("HIT THE RUN BUTTON TO CONTINUE");
	$stop;
	#50
	read = 1'b0;
	$display ("Reading Location PROM [00]000H. Data in next line should be 00\n");
	#50
        $strobe ($time," Read:%h Write:%h Address:%h Data:%h\n", read, write,address, data);
	#50
	$display ("Turing off read signal\n");
	read = 1'b1;
        $strobe ($time," Read:%h Write:%h Address:%h Data:%h\n", read, write,address, data);
	#50
	$display ("Reading Location PROM [00]00fH. Data in next line should be FF\n");
	read = 1'b0;
	address = {2'b00,12'h00f};
	#50
 	$strobe ($time," Read:%h Write:%h Address:%h Data:%h\n", read, write,address, data);
	#50
	$display ("Turning off read signal\n");
	read = 1'b1;
	$strobe ($time," Read:%h Write:%h Address:%h Data:%h\n", read, write,address, data);
	#50
	$display ("Writing Location SRAM [00]800H. Data written is DD\n");
	address = {2'b00,12'h800};
	#50
	reg_data = 8'hdd;
	write_en = 1'b0;
	#50
	write = 1'b0;
	#50
	$strobe ($time," Read:%h Write:%h Address:%h Data:%h\n", read, write,address, data);
	#50
	write = 1'b1;
	#50
	write_en = 1'b1;
	$display ("Reading Location SRAM [00]800H. Data the next line should be DD\n");
	address = {2'b00,12'h800};
	#50
	read = 1'b0;
	#50
	$strobe ($time," Read:%h Write:%h Address:%h Data:%h\n", read, write,address, data);
	#50
	$display ("Done");
$stop;
end

endmodule